At the Consumer Electronics Show 2019Taiwanese company Etron Technology has shown a completely new memory architecture called RPC DRAM (RPC - Reduced Pin Count, DRAM - Dynamic Random Access Memory), which is characterized by a smaller number of contacts, while performance is similar to DDR4.
Reduced-half architecturecontacts can both miniaturize the device and reduce cash costs. Etron Director Niki Lu suggests that the novelty is suitable for small portable gadgets and artificial intelligence subsystems. Thus, at the exhibition, the company demonstrated various types of “packaging” RPC DRAM, the smallest of them had a size of 2x4.7 mm. The American company Lattice Semiconductor, in turn, showed Etron RPC DRAM memory in the Lattice ECP5 FPGA debug board.
Etron RPC DRAM architecture is similar to DDR3 orLPDDR3 with x16, x32 and x64 organization, but uses only 22 switching signals in a packet with 40-ball fan chip scaling (FI-WLCSP). The throughput is 4.8 GB / s, 9.6 GB / s or 19.2 GB / s, respectively.
The developers have kept silent about the fact that the standard DDR3 with the organization of x16 leads to delays. How much their level is critical remains to be seen, as well as the cost of new items with its date of commencement of sales.